1. Field of the Invention
This invention relates to an improved flip-flop circuit used as a memory cell in a static RAM.
2. Description of the Related Art
A conventional flip-flop circuit used as a memory cell in a static RAM has a structure as shown in FIG. 1. In FIG. 1, reference numeral 1 denotes a MOSFET constituting the flip-flop circuit, reference numeral 2 a MOSFET for control of reading data out of the memory cell and of writing data into the same, reference numeral 3 a load resistor, reference numeral 4 a word line, and reference numeral 5 a bit line.
The static RAM has a pattern as shown in FIG. 2, and is formed on a semiconductor substrate. In FIG. 2, reference numeral 6 designates an element region in which the MOSFETs 1 and 2 are formed, reference numeral 7 the gate electrode of the MOSFET 1, and reference numeral 8 the gate electrode of the MOSFET 2.
In the pattern of FIG. 2, the gate electrode 7 of the MOSFET 1 and the gate electrode 8 of the MOSFET 2 are formed by films of the same level. In other words, the gate electrodes 7 and 8 are simultaneously formed by patterning a single silicon layer. Thus, separation regions S must be formed between the electrodes 7 and 8 to separate them from each other. This is disadvantageous to increase the degree of integration of elements.
Further, in the above pattern, the gate oxide films of the MOSFETs 1 and 2 are formed simultaneously. That is, the gate oxide films have the same thicknesses. Accordingly, the ratio of the driving force of the MOSFET 1 to that of the MOSFET 2 is determined mainly by the channel lengths and widths of the MOSFETs. To increase the ratio of the driving force, the channel width of the MOSFET 1 must be larger than that of the MOSFET 2. Therefore, the ratio of the area of the MOSFET 1 to the overall area of the substrate surface must be large, which is disadvantageous to high integration.